The present invention relates to semiconductor processing and more particularly to a method for improving the quality of a metal-containing layer deposited from a plating bath.
Currently, copper is being introduced in ULSI metallization schemes as a replacement for aluminum due to its lower resistivity and better electromigration resistance. Copper is used as conductive path. Several techniques for deposition of copper are known, among which electroless copper plating, electrochemical copper plating and copper chemical vapor deposition.
Although Al and SiO2 are still widely used in interconnect technology, copper and new low-K materials (e.g. polymers) are rapidly being implemented in microelectronics as they are now accepted as the future materials of choice. This major change is necessitated by the ever-decreasing feature sizes that have indicated RC delay-time to be the limiting factor of the next generation of microprocessors. With the use of copper, a lower resistance is obtained which, depending on many processing parameters, may be combined with a better resistance to electromigration.
At the same time the use of damascene structures has been recently introduced as means of fabricating very narrow structures (less than 0.25 xcexcm). In this scheme narrow trenches or via""s are first etched in to the low-K material, which are then subsequently filled with Cu. As the depth/width ratio of these structures increases, filling without creating voids or even closing the structure at the top becomes increasingly difficult. Therefore, brighteners and Suppressors are added to the plating solution. The terms brighteners and Suppressors are known to the person skilled in the art (cf. below). For depositing a copper layer from a copper plating bath, techniques such as electrochemical plating or electroless plating of copper are presently the preferred methods. After depositing the copper layer, a thermal anneal step is usually performed.
However, there are still problems related to the quality of the deposited metal film.
When structures comprising broader openings (like wide trenches and bonding pads or capacitors; typically linewidth higher than 3 xcexcm) and narrower openings (like trenches and via""s) need to be filled, hillocks are formed over the narrow openings while the broader openings are filled conformally. This results in the commonly encountered phenomenon of overfilling, resulting in hillocks above the trenches that cause the as-deposited film to locally be as much as twice the normal thickness. This causes severe problems for the subsequent step of chemical-mechanical processing (CMP) which works best on planar films. Apart from CMP, thickness variations of the film is an additional factor that hampers grain-boundary motion.
Although the negative effects on the topography of the deposited copper layer are known, deposition of copper layers from a plating bath is currently the most used technique. Other techniques such as Chemical Vapor Deposition result in less reliable layers and are more expensive.
The deposited copper films by plating can also show a high stress in the layer. They also can by plating exhibit a high sheet resistance.
Another problem that occurs is that the deposited copper layer shows a detrimental adhesion to the underlying layer such as a copper diffusion barrier layer or a dielectric layer.
The above mentioned problems are not limited to the deposition of a copper layer but occur also for other metal layers, for instance a cobalt layer. When a cobalt layer is deposited from a plating bath, the cobalt layer shows the adverse characteristics as mentioned above.
The method of the present invention aims to solve the problems related to the methods for deposition of a metal-containing layer from a plating bath. It is an aim of the invention to provide a solution to the problems related to the properties of a metal-containing layer deposited from a plating bath in ULSI metallization structures.
In a first aspect of this invention, a method for depositing a metal-containing film from a metal plating bath on a substrate is described. This method includes the steps of depositing a metal-containing layer from the metal plating bath in order to obtain a deposited metal-containing layer; performing a heating step and/or a vacuum step, whereby impurities incorporated in the deposited metal-containing layer or adhered to the surface of the deposited metal-containing layer are substantially eliminated; and depositing an additional metal-containing layer from the metal plating bath on the deposited metal containing layer.
The step of performing a heating and/or the step of performing a vacuum or the step of depositing the metal-containing layer can be repeated for a number of times in different sequences, whereby all openings in the insulating layer are substantially filled with the deposited metal-containing layers.
In an embodiment of this first aspect of the invention, the metal-containing layer can be a copper layer or a cobalt layer.
In a further embodiment of this first aspect of the invention, the step of performing a vacuum comprises exposing a deposited metal-containing layer in an air/vacuum-cycle.
In a further embodiment of this first aspect of the invention, the metal-containing layer is deposited in at least one narrow opening in a surrounding insulating layer wherein the narrow opening is part of an ULSI metallization structure.
In a further embodiment of this first aspect of the invention, the narrow opening can be a trench, contact hole or via as known in semiconductor processing.
In a further embodiment of this first aspect of the invention, a metal-containing seed layer is deposited prior to the deposition on the substrate of a metal-containing layer from the metal plating bath.
In a further embodiment of this first aspect of the invention, the metal plating bath can be an electroless metal-containing plating bath or an electrolytic metal-containing plating bath.
In a second aspect of this invention, a method for depositing a metal-containing film from a metal plating bath on a substrate having a narrow opening in an insulating layer is disclosed, including the steps of depositing a metal-containing layer from a metal plating bath on the substrate in order to have a deposited metal-containing layer in at least one opening; performing a heating step and/or a vacuum step on the deposited metal-containing layer, whereby impurities incorporated in the deposited metal-containing layer or adhered to the surface of the deposited metal-containing layer are substantially eliminated; and repeating both the depositing step and the heating and/or vacuum step one or more times.
In an embodiment of this second aspect of the invention, the metal-containing layer can be a copper layer or a cobalt layer.
In a further embodiment of this second aspect of the invention, the step of performing a vacuum comprises exposing the deposited metal-containing layer in an air/vacuum-cycle.
In a further embodiment of this second aspect of the invention, the opening is a narrow opening in an insulating layer in an ULSI metallization structure.
In a further embodiment of this second aspect of the invention, the narrow opening can be a trench, contact hole or via as known in semiconductor processing.
In a further embodiment of this second aspect of the invention, a metal-containing seed layer is deposited prior to the deposition on the substrate of a metal-containing layer from the metal plating bath.
In a further embodiment of this second aspect of the invention, the plating bath can be either an electroless plating bath or an electrolytic plating bath.